JEDEC JESD 22-A117B

ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST
standard by JEDEC Solid State Technology Association, 03/01/2009

JEDEC JESD51-3

LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES
standard by JEDEC Solid State Technology Association, 08/01/1996

JEDEC JESD229-2

WIDE I/O 2 (WideIO2)
standard by JEDEC Solid State Technology Association, 08/01/2014

JEDEC JEP144

GUIDELINE FOR RESIDUAL GAS ANALYSIS (RGA) FOR MICROELECTRONIC PACKAGES
standard by JEDEC Solid State Technology Association, 07/01/2002

JEDEC JESD55

STANDARD FOR DESCRIPTION OF LOW-VOLTAGE TTL-COMPATIBLE BiCMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 05/01/1996

JEDEC JESD47J

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/2017

JEDEC J-STD-609

MARKING AND LABELING OF COMPONENTS, PCBs AND PCBAs TO IDENTIFY LEAD (Pb), Pb-FREE AND OTHER ATTRIBUTES
standard by JEDEC Solid State Technology Association, 05/01/2007

JEDEC JES 2

TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION
standard by JEDEC Solid State Technology Association, 07/01/1992

JEDEC JESD8-25

POD10 – 1.0 V Pseudo Open Drain Interface
standard by JEDEC Solid State Technology Association, 09/01/2011