JEDEC JESD64-A

STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES WITH 3.6 V CMOS TOLERANT INPUTS AND OUTPUTS
standard by JEDEC Solid State Technology Association, 10/01/2000

JEDEC JESD75-6

PSO-N/PQFN PINOUTS STANDARDIZED FOR 14-, 16-, 20-, AND 24-LEAD LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 03/01/2006

JEDEC JEP65 (R1999)

TEST PROCEDURES FOR VERIFICATION OF MAXIMUM RATINGS OF POWER TRANSISTORS
standard by JEDEC Solid State Technology Association, 12/01/1967

JEDEC JESD3-C

STANDARD DATA TRANSFER FORMAT BETWEEN DATA PREPARATION SYSTEM AND PROGRAMMABLE LOGIC DEVICE PROGRAMMER
standard by JEDEC Solid State Technology Association, 06/01/1994

JEDEC JEP64 (R2002)

SOLID STATE PRODUCTS REGISTRATION LIST(ORDER FROM TYPE ADMINISTRATION OFFICE)
standard by JEDEC Solid State Technology Association, 09/01/1986

JEDEC JESD671C

Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Quality Problems)
standard by JEDEC Solid State Technology Association, 07/01/2018

JEDEC JESD 37

STANDARD LOGNORMAL ANALYSIS OF UNCENSORED DATA, AND OF SINGLY RIGHT -CENSORED DATA UTILIZING THE PERSSON AND ROOTZEN METHOD
standard by JEDEC Solid State Technology Association, 10/01/1992

JEDEC JESD209-3

Low Power Double Data Rate 3 SDRAM (LPDDR3)
standard by JEDEC Solid State Technology Association, 05/01/2012

JEDEC JESD 12-2

ADDENDUM No. 2 to JESD12 – STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET
Amendment by JEDEC Solid State Technology Association, 02/01/1986

JEDEC JEP172

DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION
standard by JEDEC Solid State Technology Association, 07/01/2014